I’ve been working on a small but powerful tool to reverse-engineer and validate CRC-8 algorithms used in automotive CAN frames.
It runs on a Teensy 4.x with a simple CAN transceiver and uses the ACAN_T4
library.
What it does
- Learns per-ID CRC placement (HEAD or TAIL), polynomial, and initial value
Validates CRCs using both normal and LUT-based (fast) functions
Includes a high-resolution benchmark mode using the Teensy’s DWT cycle counter
Provides an interactive serial console with commands for learning, validating, benchmarking, and exporting ready-to-use CRC headers
Code: Select all
BENCH id=0x80 len=8 iters=1000 | normal=383 cyc (638 ns) | fast=59 cyc (98 ns) | delta=324 cyc (540 ns)
BENCH id=0x81 len=8 iters=1000 | normal=394 cyc (656 ns) | fast=69 cyc (115 ns) | delta=325 cyc (541 ns)
BENCH id=0x82 len=8 iters=1000 | normal=399 cyc (665 ns) | fast=71 cyc (118 ns) | delta=328 cyc (547 ns)
BENCH id=0x83 len=8 iters=1000 | normal=404 cyc (673 ns) | fast=74 cyc (123 ns) | delta=330 cyc (550 ns)
BENCH id=0x84 len=8 iters=1000 | normal=409 cyc (681 ns) | fast=77 cyc (128 ns) | delta=332 cyc (553 ns)
BENCH id=0x85 len=8 iters=1000 | normal=414 cyc (690 ns) | fast=80 cyc (133 ns) | delta=334 cyc (557 ns)
BENCH id=0x86 len=8 iters=1000 | normal=419 cyc (698 ns) | fast=83 cyc (138 ns) | delta=336 cyc (560 ns)
BENCH id=0x87 len=8 iters=1000 | normal=424 cyc (706 ns) | fast=86 cyc (143 ns) | delta=338 cyc (563 ns)
BENCH id=0x111 len=8 iters=1000 | normal=60 cyc (100 ns) | fast=58 cyc (96 ns) | delta=2 cyc (4 ns)
BENCH id=0x115 len=8 iters=1000 | normal=60 cyc (100 ns) | fast=58 cyc (96 ns) | delta=2 cyc (4 ns)The LUT-based CRC computation is typically 5–7× faster while maintaining identical results.
This speedup is especially visible in the benchmark mode that runs thousands of iterations per frame using the CPU cycle counter (no micros() resolution loss).
How to Use
Connect a CAN transceiver (e.g. MCP2562FD or SN65HVD230) to Teensy pins 22 (TX) and 23 (RX).
Use SavvyCAN to replay your log onto the same CAN bus, with a minimum 10 ms inter-frame delay.
In the serial console:
mode learn to let it auto-discover CRC parameters
export / export fast to generate validator headers
mode validate or mode validate_fast to test live traffic
mode bench for high-res timing comparisons
Repository
All code, wiring instructions, and examples are on GitHub:
https://github.com/Modellfan/CRC8-SAE-R ... ring-Tool/
Why this might be useful
If you’re decoding proprietary CAN messages from inverters, BMSs, or ECUs, this tool can help you identify the CRC-8 scheme automatically — no guessing polynomials or initial values.
Once solved, it outputs ready-to-use C headers for validation in your own firmware or logging tools.
Happy CRC hunting, and feedback is very welcome — especially if you test it on other OEM networks!